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Si5040
RX_REFLOS
Interrupt Status (sticky) bit
(Register 5, bit 6)
RX_REFLOS
Alarm status bit
(Register 9, bit 6)
D
Q
CK
10 MHz Clock
Clear
C
Interrupt Enable
(Register 2, bit 5)
RX_REFLOS
Interrupt mask bit
(Register 4, bit 6)
RX_LOS
Interrupt Status (sticky) bit
(Register 5, bit 5)
RX_LOS
Alarm status bit
(Register 9, bit 5)
D
Q
10 MHz Clock
CK
C
Write-to-Clear
RX_LOS
Interrupt mask bit
(Register 4, bit 5)
Clear
Interrupt Enable
(Register 2, bit 5)
RX_LOL
Interrupt Status (sticky) bit
RX_LOL
Alarm status bit
D
Q
(Register 5, bit 4)
(Register 9, bit 4)
CK
10 MHz Clock
Clear
C
Interrupt Enable
RX_LOL
Interrupt mask bit
(Register 4, bit 4)
(Register 2, bit 5)
INTERRUPT
Interrupt pin
(Open drain or LVTTL , Active Low)
TX_REFLOS
Interrupt Status (sticky) bit
TX_REFLOS
Alarm status bit
D
Q
(Register 133, bit 6)
(Register 137, bit 6)
CK
10 MHz Clock
Clear
C
Interrupt Enable
TX_REFLOS
Interrupt mask bit
(Register 132, bit 6)
(Register 2, bit 5)
TX_LOS
Interrupt Status (sticky) bit
TX_LOS
Alarm status bit
D
Q
(Register 133, bit 5)
(Register 137, bit 5)
CK
10 MHz Clock
Clear
C
Interrupt Enable
TX_LOS
Interrupt mask bit
(Register 132, bit 5)
(Register 2, bit 5)
TX_LOL
Interrupt Status (sticky) bit
TX_LOL
Alarm status bit
D
Q
(Register 132, bit 4)
(Register 137, bit 4)
CK
10 MHz Clock
Clear
C
Interrupt Enable
TX_LOL
Interrupt mask bit
(Register 132, bit 4)
(Register 2, bit 5)
Figure 23. Device Interrupt Tree
38
Rev. 1.3
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